PI layer was generally made of a PAA resin solution, which made up of PMDA and ODA as the main monomers and form as polymerize in polar solvent, such as DMAc or DMF. The PI layer was obtained with the PAA resin solution had the process of salivating into gel film, directional stretching, imide and post-treatment processes. In addition to resin synthesis, other processes were all carried out in a clean workshop within 10000ppm. Figure 2 showed the synthetic route architecture of the PI. The architecture of ODA and PMDA were showed as Figure 2a, the synthetic of PI was be classified into two kinds, which were PI one step method and two step method, as showed in Figure 2b and Figure 2c. For the one step method of PI’s synthetic, the ODA and PMDA were dissolved in a polar solvent with the same molar mass, then the structure of polyimide was formed with a heat process of the two reactants in polar solvent. Finally, the PI film obtained with a curving process of the PAA resin solution. For the two steps method of PI’s synthetic, the ODA and PMDA were dissolved in a polar solvent with the same molar mass at a room temperature. Then the PI film was formed after the imidization reaction.

There are many countries have developed PI materials, such as American, Germany, Saudi Arabia, Japan, Chinese Taiwan, South Korea and Belgium. The company names and they developed PI products were showed in Table 2. The DuPont was the earliest enterprise to mass produce polyimide and it is also the world's largest polyimide producer in currently, with an occupying over 40% of the high-performance polyimide film market. The PI product of DuPont mainly included Kapton® and Vespel®. For the Kapton® films, DuPont had developed three type of improved polyimide film, namely HN type, FN type and VN type. The three improved PI films have accounted for 85% of the entire imine film production. The Evonik had developed the P84® fiber, which was composed only of aromatic skeleton units. Despite being an aromatic halogen-free structure without a melting point, P84® fiber is classified as a non-flammable fiber with its extreme oxygen coefficient of 38%. With excellent physicochemical properties, P84® fiber can be used in various applications from filter media for high-temperature filtration, protective clothing, sealing materials for spacecraft. The SABIC developed the EXTEM™ and further promoted the development of 5G printed circuit boards (PCBs), transparent displays and other flexible electronic applications. The UBE had successfully developed a new type of linear polyimide in the early 1980s, including the UpilexR, UpilexS, and UpilexC series films, which broke the 20 years monopoly of polyimide films made from PMDA and DDE. The Kaneka began to research polyimide films in the laboratory as early as 1980 and successfully developed a new type of homogeneous benzene PI film, which was named Apical™. In 1984, the company also established the first Apical polyimide film production line in Shiga in 1984 and began mass production in 1985. This PI product is mainly used in FPCS. The Mitsui Chemicals had developed the PI product named AURUM™ (Thermoplastic polyimide), which can be applied to precision machinery, industrial machinery components, electrical and electronic components, automotive and transportation machinery components, special wire sheaths, films and fibers, and composite material substrates. The Mitsubishi Gas Chemical was the only manufacturer in the world capable of truly industrializing the production of transparent PI films, which could meet the needs of high heat resistance and high transparency electronic products. The Mitsubishi Gas Chemical was the first company to announce the mass production of a colorless transparent polyimide film with the product named Neopulim in 2007. This PI product was mainly used in soft display related products and optical components. The Kapton® polyimide film developed by Toray has become an industry standard due to its excellent electrical performance, heat resistance, chemical resistance and clever combination of high mechanical strength based on its high performance, reliability, durability, insulation and the ability to withstand extreme temperatures, vibrations and other demanding environments. The Kapton® polyimide film adopts innovative design solutions and is widely used in various industries, such as electronic circuit materials (FPC, COF, FFC), high-temperature resistant tapes, black PI films, photovoltaics, automobiles and various industrial applications. The Taimide has over 30 years of experience in the research and development of polyimide (PI) films, also has successfully become a global leader in the production of PI films in the polyimide film industry with high technical barriers and special materials. The PI films produced are essential cutting-edge materials for various light, thin, short and small electronic products. The PI product developed by Taimide mainly included Taimide®TH, Taimide®TL, Taimide®TX, Taimide®BK, Taimide®OT and Taimide®WB. The Taimide®TH with a film thickness ranged from 12.5um to 125um. The Taimide®TL with a film thickness ranged from 12.5um to 50um and can be applied to print flexible circuit boards, protective films, enhanced plates, composite boards and flexible copper foil substrates. The Taimide®TX with a film thickness of 7.5um can be applied to tape thin high-temperature insulation, thin pressure-sensitive tapes and soft hard bonding boards. The Taimide®BK, a black polyimide film with a thickness ranging from 10um to 75um, can be applied to opaque high-temperature insulation tapes, opaque enhanced plates and composite boards. The Taimide®OT, a colorless polyimide film with a thickness ranging from 12.5um to 50um, can be applied to high-temperature resistant colorless protective films, flexible displays and flexible electronics. The Taimide®WB, a white polyimide film with a thickness ranging from 12.5um to 25um, can be applied to flexible printed circuit boards, high-temperature resistant white protective films, reinforcing films, LED light strips and barcode printing. The SKCKOLONPI is the first company in South Korea history to manufacture polyimide films, specializing in the production of cutting-edge polyimide films and paste products. The SKCKOLONPI had also developed a serious of PI products, such as LV (with a high temperature resistance), GC (black coated film), GF (laminated board), GFW (white coated film) and GL (with a low-expansion coefficient). The Torlon®PAI is the highest performing melt processability thermoplastic which was developed by SOLVAY. The typical applications of Torlon®PAI included aircraft hardware and fasteners, automotive transmission and powertrain components, as well as oil and gas exploration and recovery equipment. The excellent electrical insulation performance of this material makes it a common choice for semiconductor manufacturing and testing, as well as electrical and electronic components.

PI was usually regard as an insulation layer in electronics, such as OLED device and IC packaging. Based on the request of PI layer with patterning or without patterning, the usage method of PI was also classified into three methods.

For the usage of PI, if there was no patterning request for PI layer, the PAA resin solution was sprayed on a substrate directly with a spinning or slitting coating method and formed a wet organic layer which with a uniform thickness. Then a vacuum dehydration (VCD) process was taken on the wet organic layer to remove the most solvent. Finally, the PI film was formed after a curving process without another process. The formation of flexible substrate in the array structure of OLED display was usually taken this kind of usage method. As showed in Figure 3, PI was used as a cover material for foldable flexible display screens and as a substrate for high-frequency FPC (flexible printed circuit board). When PI regarded as a flexible substrate in OLED device, the PAA resin solution was coverage on the whole surface of glass substrate with a size of 370mm*470mm or 920mm*750mm, and the size of the glass substrate may be even larger than 920mm*750mm. The PI1 layer was formed on the glass substrate after a curving process with the PAA resin solution coverage on the whole surface of substrate. Then the barrier1 was deposited on the surface of PI1 as a stress buffer layer. Finally, the PI2 layer was formed on the barrier1 based on a same method with the formation of PI1. The thickness of PI1 and PI2 were usually as 6um and 6um or 8um and 8um. In the preparation of OLED devices, the yellow polyimide (YPI) with a high yellow index was usually introduced as a flexible substrate. The colorless polyimide (CPI) also was regarded as a flexible substrate in camera under panel (CUP) in organic light-emitting diode display (OLED) display which required a high transmittance (Tr%).

With the patterning request for PI layer, there was usually two methods including transfer patterning with photoresist (PR) layer technology and laser technology for the usage of PI.⁵⁶ The process flow of the transfer patterning with PR layer technology was showed in Figure 4a. The PAA resin solution was usually spined on a substrate and the PI film was formed after a curving process. Then there was another PR layer with patterning was formed on the top of curved PI layer after the process of coating, exposure and development of PR. A wet etching or gas etching process was applied on the PI layer based on the patterned PR layer, and the patterning would be transferred from the PR layer to PI layer. Finally, the PR layer was removed from the top of patterned PI layer. This method for the usage of PI was usually used in the IC packaging. The process flow of the laser technology for the usage of PI with a patterning request was showed in Figure 4b. First, the PAA resin solution was spined on a substrate and the PI film was formed after a curving process. Then a laser process was applied on the surface of PI film, the width and depth of the opening area could be controlled by the time and intensity of laser. The laser area on the PI was defined by a CAD drawing, which was pre formed based on the process requirement. The process of plasma treatment was also necessary due to the residual of PI film in the opening area. Finally, a AOI inspection was introduced to confirm if the residual of PI still existed. This method for the usage of PI was also used in the IC packaging industry. When PI regarded as passivation layer in IC packaging, the PAA resin solution was coverage on the whole surface of silicon wafer with a size of 8 inch or 12 inch. Then the PI film with a thickness about 2um was formed on the surface of silicon wafer after a curving process. Based on the patterning request during the IC packaging process, the PI film located on the pad of IC chip was removed by taking the method as showed in Figure 4. Finally, a patterning re-distribution layers (RDL) was formed on the surface of PI film based on the PVD, plating and photolithography technologies. For reducing the cost of IC packaging, the two methods of PI showed in Figure 4 were usually introduced to form passivation layer during the process of IC packaging.

Based on the transfer patterning with PR layer technology, there are two key process for forming patterning on PI layer.⁵⁷ Firstly, the fabrication of PI layer. As an insulating polymer material, PI film has excellent electrical insulation properties and is suitable for scenarios such as motor slot insulation and cable winding. The PI material in the form of thin film has a good flexibility and tensile resistance, which could make it easy for subsequent processing and patterning. Secondly, the patterning transfer process from PR layer to PI layer based on etching process. For the core function, the PR layer is exposed and developed through photolithography technology to form a predetermined two-dimensional or three-dimensional patterning, which is served as a mask for subsequent etching process. During the etching process, the unexposed (negative adhesive) or exposed (positive adhesive) PR areas could protect the PI substrate and achieve patterning transfer from PR layer to PI layer. For the compatibility controlling between PI and PR, the surface of PI layer needs to be modified with hydrophilicity (such as plasma treatment) to improve the uniformity and adhesion of PR coating. The high temperature resistance of PI layer is also compatible with the baking process of PR layer (usually 80~150 ℃), which could avoid the deformation or degradation of substrate. During the typical process of transfer patterning with PR technology, the thickness of PI layer was usually controlled between a few micrometers to several hundred micrometers according to demand by coating or vapor deposition methods.^58-59 While, the thickness of PR layer was usually about 1~5 microns by uniformly coated on the surface of PI layer with spin coating or spray coating methods. Then UV exposure is applied to the PR layer through a mask to induce chemical changes (positive gel decomposition or negative gel cross-linking) in the exposed area. The uncured (positive adhesive) or cured (negative adhesive) PR parts will also be removed by the development process to obtain the target patterning. Finally, during the etching transfer process, the PR patterning was used as a mask and the PI film is selectively etched by introducing a dry etching (such as plasma etching) or wet etching (chemical etching solution). The residual PR layer is also removed by using a stripping solution to obtain a patterned PI structure after etching process is completed. A high-temperature annealing process was also applied on the PI patterning layer to eliminate internal stress and enhance structural stability for completing the integration of device. The potential application areas of the transfer patterning with PR layer technology is the preparation of flexible electronics, the microelectronics packaging and the fabrication of micro nano sensor array structure, and the key challenges of this technology are the etching accuracy and PR peeling residue. The chemical stability of PI materials may result in slower etching rates and etching parameters (such as plasma power and gas ratio) need to be optimized to improve patterning resolution. The hydrophobicity on the surface of PI layer may make it difficult to completely remove PR residue.

The key characteristics of laser technology for forming patterning on PI layer are mainly including non-contact processing, high-precision control and material adaptability optimization, which is suitable for high-end fields such as microelectronics and flexible circuits. For the characteristic of non contact processing and no physical damage, the laser was directly acting on the surface of PI layer through a high-energy beam for vaporizing or modifying the material with photothermal effect, and forming patterning without physical contact. The laser technology could avoid material deformation or damage causing by mechanical stress, especially suitable for ultra-thin PI substrates (such as flexible circuit substrates). For the high precision and microscale patterning capability, the minimum processing accuracy of laser technology could reach 25 microns (about a quarter of a hair diameter), which can support the production of complex microcircuits and fine markings. The technical supporting for laser technology is the adopting beam shaping technology (such as square/circular light spots), which was used to optimize laser energy distribution and reduce energy unevenness of Gaussian light sources for improving edge sharpness of patterning on PI layer. For the process compatibility and efficiency of laser technology, the high reflection or difficult to process materials (such as metalized PI) was applied by multi laser composite technology, which could improve melting efficiency and stability with combining different wavelength lasers (such as red blue composite lasers). The scanning strategy derived from large format ultra high speed photopolymerization technology can achieve efficient large-area pattern processing with a high speed processing. For the application scenarios and technical challenges of patterning on PI layer based on laser technology, the core application included flexible electronics, anti counterfeiting label and biomedical devices, such as the fine line etching of flexible circuit boards (FPCs), the surface functionalization patterning of microfluidic chips or implantable devices and so on.

Traditional positive photoresist is mainly composed of three parts: film-forming agent (linear phenolic resin), photosensitive agent and solvent, which have good photosensitivity. In the molecular design of positive PSPI, it is expected to become soluble in the exposed area, which can be washed away during the development process. Meanwhile, the un-exposed area can also form a patterning during the development process. For reaching this purpose, some functional groups such as carboxyl groups which can be dissolved in dilute alkaline solutions were usually introduced into PI. Some PI dissolution inhibitors that can be decomposed when exposed to light, such as diazonaquinone sulfonate compounds were also added into PI for the preparation of PSPI.

PSPI photoresist can be classified into positive and negative photoresist based on the imaging mechanism of the photoresist sample. PSPI photoresist can also be classified into G-line/I-line/mixed line photoresist based on the exposure wavelength. Different types of PSPI photoresists have significant differences in resin selection, and are often subdivided into various types such as negative ester type PSPI, negative ion type of PSPI, positive diazonaphthoquinone type of PSPI, chemical amplification type of PSPI and so on, as showed in Figure 5. For the negative ester type PSPI, the photosensitive group was connected to the polyimide prepolymer with ester bonds, as showed in Figure 5a. For the negative ion type of PSPI, the PAA resin was obtained by reacting with organic amine compounds to form salts, as showed in Figure 5b. For positive diazonaphthoquinone (DNQ) type of PSPI, the ortho azide naphthoquinone group was introduced with side groups or directly added to impart photosensitivity, as showed in Figure 5c. For the chemical amplification type of PSPI, which was usually composed of photo induced acid generator (PAG, such as PTMA) and matrix resin (PAA), as showed in Figure 5d. Under the UV irradiation, the PAG can decompose into super strong acid, then catalyzing the decomposition or crosslinking reaction of matrix resin. Due to its recyclability, it has high efficiency and therefore has a chemical amplification effect.

PSPI film was usually regard as an insulation layer in electronics, such as OLED device, IC fabrication and IC packaging. Based on the patterning request of PSPI layer, the usage of PSPI was usually introduced for forming passivation layer based on the technology of photolithography.

2.2.2.1 The application of PSPI used in OLED device

During the manufacturing of OLED device, PSPI was widely used as PLN and PDL due to its photosensitive performance, thermal stability and patterning accuracy.^60-61 The application of PSPI not only simplified the process flow, but also directly affected the luminous efficiency, resolution and reliability of OLED display device. Based on its excellent film-forming performance, PSPI could form a uniform thin film through spin coating or spray coating by after a curing process, the surface roughness (Ra) of PSPI layer could reach the value below 0.5nm, which can effectively eliminate the step differences existed in the bottom ITO electrode or TFT array structure and provide a flat substrate for subsequent organic light-emitting layer evaporation. During the high-temperature (about 200-300°C) environment of OLED packaging process, PSPI can still maintain structural stability for resisting acid and alkali corrosion, avoiding chemical reactions with subsequent organic materials.⁶² For improving the luminescence uniformity and device lifespan of OLED device, PLN layer formed by PSPI can also reduce the uneven thickness of organic luminescent materials causing by the unevenness of the bottom layer and avoid brightness differences in the display screen. The dense molecular structure of PLN layer formed by PSPI can also block the penetration of external water vapor and ions to reduce the dark state current of OLED devices and extend their service life.

The material characteristics of high-precision patterning and mechanical support made it possible for PSPI using as PDL layer in the array structure of OLED display device. Without requiring additional photoresist, PSPI can directly form micrometer level patterns (line width accuracy of 1-3um) based on UV exposure, which could meet the strict requirements of pixel spacing for high-resolution (such as 4K/8K) OLED display device.⁶³ After exposure crosslinking, the unexposed area of negative PSPI dissolves during development process and formed pixel wells perpendicular to the sidewall, which can ensure the precise filling of organic materials during evaporation and avoiding adjacent pixel crosstalk. By using as PDL layer, PSPI layer coulddivide OLED panels into independent red, green, and blue (RGB) sub pixels to prevent mixing of different colored luminescent materials and ensure color purity. During the vapor deposition process of fine metal mask (FMM) technology, the mechanical strength of PSPI can support the bonding accuracy between the mask and the substrate to reduce pixel offset causing by mask deformation.

With the development of technology, PSPI was usually used as PLN, PDL and pixel supporting (PS) layer in the foldable flexible OLED device. The PDL and PS layer were usually formed with a technology named half tone mask and the architecture was showed in Figure 6. The half tone mask was made up of three parts, the fully transparent zone, the semipermeable zone and the impermeable zone. During the exposure process, the light can through the fully transparent zone on the mask completely without any loss and reach the surface of PSPI film, and the PSPI film located at the fully transparent zone was removed fully and formed the opening area after the develop process. While, only part of light can through the semipermeable zone on the mask and reach the surface of PSPI film during the process of exposure, the PSPI film located at the semipermeable zone was also removed part thickness and formed the PDL layer after the develop process. Finally, there was no light can through the impermeable zone and reach the surface of PSPI film, the PSPI film located at the impermeable zone remained the fully thickness and formed the PS layer.

During the preparation of OLED display devices, PSPI was also used to forming the PDL layer and PS based on half-tone mask technology. The principle of half-tone mask was adjusting the exposure dose through the semi transparent area, allowing partial development of the photoresist and forming a thickness gradient slope structure to solve the step coverage problem of the PDL/PS layer.⁶⁴ The key advantage of half-tone mask was eliminating the flowing of organic material in the climbing area. For example, in the segment difference area (climbing area) of the shading layer (such as metal wiring), the traditional processes of forming PDL usually caused uneven coverage due to the flow of PLN material, which could lead to etching and wire breakage in following process.⁶⁵ While, the half tone technology could ensure the uniform coverage of PDL layer through gradient slope (controllable inclination angle above 85°) and avoid the exposing of metal traces. For the process simplification and cost reduction, the traditional processes require multiple photomasks to prepare PDL openings and PS structures separately and the half-tone mask technology is integrated into a single exposure, which could reduce the use of photomasks (such as reducing from 2 to 1 in LTPS processes). The companies such as Samsung Display and TCL China Star Optoelectronic Technology Co, Ltd. (CSOT) have all applied the half-tone mask technology in the process of flexible OLEDs device, which could significantly reduce the process time (such as PDL/PS synchronous graphing) and increasing yield over 20%. In summary, the half-tone mask technology has become the core solution for the preparation of PDL/PS layers in OLEDs device through gradient exposure, process integration and material adaptation, which was especially suitable for the thin layer and high-precision requirements of flexible screens. In the future, the half-tone mask technology need to get a breakthrough in nanoscale critical diameter control and mask cost optimization to support the development of 8K ultra high definition displays.

As showed in Figure 7, the PSPI was used to form PLN layer, PDL layer and PS layer in the preparation of OLED device. The PLN layer was covered on the source drain layer and used to reduce the undulating drop caused by the patterning source drain layer. The number of PLN layer was usually more than one layer, which was decided by the technological requirements of OLED device. The patterning anode of the electroluminescence (EL) part was formed on the surface of PLN layer. Then the PDL layer was covered on the PLN layer and anode layer, which was used to defined the pixel deposited area. The opening area in the PDL layer was used to deposit the luminescent functional layer during the electroluminescence (EL) manufacturing process with fine metal mask (FMM) technology. The PS layer was formed based on the technology of half tone mask technology and was used to as supporting part to prevent the anode from being damaged during the EL manufacturing process.

2.2.2.2 The application of PSPI used in IC fabrication

As a polymer that combines photosensitive properties and high-performance material properties, PSPI is widely used in dielectric layers and passivation films in chip manufacturing.⁶⁶ Its core characteristics and functions are reflected in three dimensions including material properties, process optimization and functional implementation. For the core characteristics and functions of PSPI as a dielectric layer, the high insulation and structural stability of PSPI were its key material characteristics. Base on the excellent dielectric properties, such as a typical dielectric constant of 3.0-3.5, a dielectric strength of 200-300kV/mm, a volume resistivity of 10¹⁶-10¹⁸Ω·cm and a surface resistivity of 10¹³-106¹Ω·cm, PSPI could effectively isolate electrical crosstalk between different layers of the chip. When used as dielectric layers and passivation layer in manufacturing of chip, PSPI can simplify the patterning process and reduce costs obviously. Traditional non photosensitive PI relies on photoresist to complete patterning, which includes multiple steps such as coating, curing, photoresist coating, exposure, development and etching process. While, the photosensitive groups (such as epoxy groups and double bonds) contained in PSPI structure can be directly crosslinked or decomposed through radiation such as ultraviolet light, eliminating the need for additional photoresist and etching steps, shortening the process cycle and saving material costs. The protection function of PSPI was isolating environmental erosion and improving chip reliability when using as a passivation film. The passivation film in IC structure needs to protect the surface of the chip from water vapor, impurities and chemical corrosion.⁶⁷ PSPI can form a stable protective layer in high temperature and high humidity environments to reduce leakage current and increase breakdown voltage based on its dense molecular structure (main chain containing imide rings) and high temperature resistance (high Tg). For example, PSPI was used as a surface passivation layer in CPU and GPU flip chip packaging to ensure the long-term stability of precision circuits.

The application of PSPI in the semiconductor and microelectronics industry is mainly used as passivation layer and particle shielding film. For the passivation layer, the PSPI was usually used to form the protecting layer of the chip to prevent the IC from being damaged during the using process.⁶⁸ The architecture of PSPI used as a protecting layer in logic IC was showed in Figure 8. The PAA resin solution was sprayed on a substrate directly with a spinning or slitting coating method and formed a wet organic layer which with a uniform thickness. Then a soft process was carried out to remove the most solvents of wet organic layer. The exposure and develop process were carried out to form the request patterning with a mask. Finally, the curving process was used to confirm the PSPI film sturdy. For the particle shielding film, the radiation resistance performance of IC became more important based on the increasing of integrated circuit density and chip size. The high purity polyimide film is an effective radiation and particle resistant shielding material. Forming a 50~100um radiation shielding layer on the passivation film of the component casing can prevent memory errors caused by the release of trace amounts of uranium and peony. The excellent mechanical properties of polyimide can prevent chips from breaking during subsequent packaging processes.The structure of particle shielding film usually included two types, which were oxide/nitride/PSPI layer and fully PSPI layer.

2.2.2.3 The application of PSPI used in IC packaging

In the manufacturing of IC packaging, PSPI has played a key role in improving packaging reliability and process efficiency by using as a stress buffer layer and adhesive based on its unique material properties. For its mechanical performance advantages, a high elastic modulus (usually 2-5GPa) and low CTE (20-50ppm/°C) of PSPI could enable it to effectively absorb thermal stress between the chip and substrate for preventing warping or cracking caused by temperature cycling. The imide ring in its molecular structure endows the PSPI with high toughness for providing cushioning protection in the event of chip drop or mechanical vibration, which was especially suitable for mobile device chip packaging.⁶⁹ For the application scenarios and technological value, PSPI was used as core layer during the advanced IC packaging. For example, PSPI was served as a stress buffer layer for the rewiring layer (RDL) to isolate the thermal expansion difference between the silicon chip and the organic substrate for ensuring the stability of high-density interconnect structure in chip on wafer on substrate (CoWoS) and fan out wafer level packaging (FOWLP) technologies. When using as stress buffer layer, PSPI could also improve the lifespan of chips in high temperature and high humidity environments by reducing solder joint fatigue caused by thermal stress and the risk of packaging failure also reduced significantly.⁷⁰

When using as an adhesive in IC packaging, the polar groups (such as carbonyl and amino groups) in PSPI molecules can form chemical bonds with metals (such as copper pillars and bumps) and silicon substrates for providing stable interfacial adhesion. During the integration of multi layer structure in 2.5D/3D packaging, PSPI was used for bonding chips, interposers and substrates to achieve mechanical fixation and electrical insulation integration of heterogeneous materials. Meanwhile, PSPI can directly form adhesive area patterning through exposure and development process without the additional photoresist steps and simplifying multi-layer stacking process. Some modified PSPI material can be cured below 200℃ to avoid high-temperature damage to thermal sensitive components (such as MEMS sensors). Finally, PSPI can also used assupporting multi-layer wiring and mechanical protection. In advanced IC packaging, such as WLCSP and fan out packaging, PSPI is used as a dielectric layer to construct a rewiring layer structure for supporting micro connections such as copper pillars and bumps and protecting internal circuits from physical damage.The high strength and toughness mechanical properties (such as strong impact resistance) could adapt to stress changes during chip packaging process.

The application of PSPI used in the IC packaging is mainly used as passivation (PA) layer during the process of IC packaging. For the passivation layer, the PSPI was usually used to form the insulation layer between re-distribution layers (RDL) to block the electrical signals between the metal circuit layers of the chipeffectively, resulting no short circuits in the circuit and increasing the stability and reliability of electronic devices. Besides, the protecting layer formed by PSPI can also prevent water and oxygen from damaging the IC during the using process, which can increase the operation life of electronic devices. As showed in Figure 9a, the number of passivation layers in the IC bumping packaging was usually more than two, some electronic devices even needed three or four passivation layers. The passivation layers and RDL layers were interleaving and overlapping with each other on the surface of chips. Apart from the Cupper bump on the top layer of chip, each RDL layer was fully covered by the passivation layer to guarantee the electrical signals of chip. As showed in Figure 9b, the PSPI was also used as passivation layer in IC fan in wafer level packaging (FIWLP). The number of passivation layers in the IC FIWLP was usually less than two. The PA1 covered on the surface of chip with opening area corresponding to the pad of chip, and the patterning RDL1 also formed on the surfaces of PA1 and connected with pad of chip through the opening area in PA1. The PA2 also covered on the surface of PA1 and RDL1 with opening area, and the patterning RDL2 located on the surfaces of PA2 and connected with RDL1 through the opening area in PA2. It should be noted that the size of PA1 and PA2 were all same with the size of chip in the IC FIWLP package.As showed in Figure 9c, the PSPI was also used as passivation layer in IC fan out wafer level packaging (FOWLP). The number of passivation layers in the IC FOWLP was usually two. The PA1 covered on the surface of chip with opening area corresponding to the pad of chip, and the patterning RDL1 also formed on the surfaces of PA1 and connected with pad of chip through the opening area in PA1. The PA2 also covered on the surface of PA1 and RDL1 with opening area, and the patterning RDL2 located on the surfaces of PA2 and connected with RDL1 through the opening area in PA2. The size of PA1 and PA2 were all larger than the size of chip in the IC FOWLP package, which can provide wider area to distribute the RDL2 for meeting the increasing number of I/O density on chips.、